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HA13614FH
Combo (Spindle & VCM) Driver
ADE-207-246D (Z) Preliminary 5th Edition October 1998 Description
This COMBO driver for HDD application consists of sensorless spindle driver and BTL type VCM driver. "PWM soft switching function" for low power dissipation and less commutation acoustic noise at the same time is implemented by using the IPIC* process. Note: Intelligent P ower IC
Features
* * * * PWM soft switching drive Small surface mount package: FP-48T Low thermal resistance: 30C/W with 4 layer multi glass-epoxy board Low output on resistance Spindle 1.2 Typ VCM 1.4 Typ * TTL compatible input level (with 3.3 V logic interface) * High precision reference voltage output (for 3.3 V power supply)
Functions
* * * * * * * * * * 16 bit serial port 2.0 A Max/3-phase spindle motor driver with PWM soft switch function 1.5 A Max BTL VCM driver with low crossover distortion PWMDAC for VCM drive current control Power off brake function for spindle motor Auto retract with constant output voltage Booster Internal Protector (OTSD, LVI) Precision power monitor OP amplifier
HA13614FH
Pin Arrangement
VIPWML 12VGOOD DATA SEENAB SCLK CLK
42 41 40 39 38 37 36 COMM 35 PHASE 34 SPNCTL 33 UFLT 32 NFLT 31 VpsIN
POR LVI1 DELAY DACOUT VREF VIPWMH
TABGND
48 47 46 45 44 43
OP1OUT OP1IN(-) OP2IN(+) Vss OP2OUT PC
1 2 3 4 5 6
TABGND
TABGND
VCMPS VCMN Rs VCMIN VCMP VCMSLC
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
30 VpsOUT 29 FLTOUT 28 Vpss 27 W 26 ISENSE 25 CT
RETPOW RETSET BC1 BC2 Vpsv VBST
TABGND
(Top View)
2
BRKDLY U V RNF BRK LVI2
HA13614FH
Pin Description
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 Pin Name OP1OUT OP1IN(-) OP2IN(+) Vss OP2OUT PC VCMPS VCMN Rs VCMIN VCMP VCMSLC RETPOW RETSET BC1 BC2 Vpsv VBST BRKDLY U V RNF BRK LVI2 CT ISENSE W Vpss FLTOUT VpsOUT VpsIN NFLT UFLT +12 V power supply for VCM driver Output of booster circuit Time constance set up terminal of delayed brake U-phase output of spindle motor driver V-phase output of spindle motor driver Current sensing terminal for spindle motor driver External capacitor connection terminal for power off brake Resistor connection terminal for set up the threshold of +3.3 V power monitor Center tap connection terminal for spindle motor Input of PWM comparator W-phase output of spindle motor driver +12 V power supply for spindle motor driver PWMDAC output for current control of spindle motor driver Output of power supply switch Input of power supply switch (+12 V) Output of pre-filter for B-EMF sensing (capacitor connection terminal) Function Output of OP amp. 1 Inverted input of OP amp. 1 Non-inverted input of OP amp. 2 Power supply for +5 V Output of OP amp. 2 External time costant connection terminal for phase compensation of VCM driver Current sensing terminal for VCM driver Output of VCM driver (Inverted output of VCMP) Current sensing terminal for VCM driver (differential input for VCMPS) Input of VCM driver (differential input for VREF) Output of VCM driver (inverted output of VCMN) External capacitor connection terminal for stabilizing internal reference voltage of VCM driver Power supply terminal of retract driver Output voltage set up terminal of retract driver External capacitor connection terminal for pumping of booster
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Pin Description (cont)
Pin No. 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 TAB Pin Name SPNCTL PHASE COMM CLK SCLK SEENAB DATA 12VGOOD VIPWML VIPWMH VREF DACOUT DELAY LVI1 POR GND Output of internal reference voltage PWMDAC output for current control of VCM driver Capacitor connection terminal for set up the power on reset time Resistor connection terminal for set up the threshold of +12 V power monitor Output of power on reset signal Ground of this IC Function PWMDAC input for current control of spindle motor driver Toggle signal output for zero-crossing timing of B-EMF Commutation signal input for spindle motor driver during synchronous driving Master clock input of commutation logic circuit Clock input of serial port for data strobe Enable signal input of serial port Data signal input of serial port Output of power monitor for +12 V power supply (open drain) PWMDAC input for current control of VCM driver
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Block Diagram
Vps (+12V) C111 Vss (+5V) R109 C112 C116 Vss VpsIN VpsOUT Vpss 4 23 19 31 30 28 BRKDLY BRK CLK 25 BRAKE POR OTSD CLK EXTCOM VBST Brake control Commutation logic U Spindle driver V W SPN GAIN PWMOUT B-EMF Input filter Current control (PWM) 20 21 27 22 26 17 VBST U V W RNF ISENSE Vpsv C110 13 14 RETPOW RETSET C115 R105 12 C109 P VCM driver N VCMP PC VCMN VCMPS VCMENAB Vref(=5.3V) POW DWN BIAS Vps Vss Vss (+5V) Power monitor2 Vss Power monitor1 TAB Vps (+12V) LVI1 47 R101 R102 R108 24 48 POR delay VBST CLK Booster 18 VBST C107 POR (L: RESET) R103 OTSD Rs 11 6 8 7 9 41 Vss (+5V) 12VGOOD (Open Drain) R110 R104 C108 RL RS R106 RNF
C113
C114
CLK 37 C101 UFLT NFLT C102 COMM 36 PHASE 35
1 128
CT
33 32
B-EMF Amps
SPNCTL 34 (TESTOUT) C103 29 FLTOUT 1.4V ref. Selector + OP Amp.1 OP1IN(-) 2 OP1OUT 1 OP2IN(+) 3 - TEST
MASK
+ OP Amp.2 - VBST + VREF VIPWMH -
Retract driver VCMSLC
OP2OUT 5 VCMIN 10 C104 44 43 C1
PWM VIPWML decoder 42 DACOUT 45 Serial input
STANDBY SCLK 38 DATA 40 SEENAB 39 RESET SPNENAB EXTCOM BRAKE VCMENAB SOFTSW TEST SPNGAIN
LVI2 DELAY 46 15 16 R107 Vdd BC1 BC2 (+3.3V) C105 C106 C117
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HA13614FH
Serial Port
Construction
SEENAB SCLK DATA RESET * Serial port
D0 to D15 to each block
Note: When POR = Low, internal RESET signal becomes High and when RESET = High, all bit of serial port are set up default value as shown in table 2.
Figure 1 Table 1
Input POR Low Open Note:
Construction of Serial Port
Truth Table of Internal RESET Signal
Ou tp u t RESET High Low 1 1 Note
1. When +5 V or +3.3 V power supply goes to Low, then POR = Low. POR output is able to construct the wired logic with external signal.
Input Data
MSB LSB
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Figure 2
Input Data
The serial port is required the 16 bits data (D0 to D15). When the data length is less than 16 bits, the internal register will not be up dated. And when the data length is more than 16 bits, this register will take later 16 bits and ignore the faster bit.
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Bit Assingnment Table 2
Bit D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 Note:
Bit Assingnment of Serial Port
Symbol STANDBY VCMENAB SPNENAB BRAKE SENSEN VARCNT EXTCOM SRCTL1 SRCTL2 SRCTL3 OFFTIME1 OFFTIME2 SPNGAIN RETRACT TEST1 TEST2 High gain Retract For testing Low gain Not retract Off time select of PWM drive (See table 5) 1 (= High) Active VCM enable Spindle enable Brake enable B-EMF sense enable Variable count External commutation High slew rate 0 (= Low) Stand by VCM disable Spindle disable Brake disable B-EMF sense disable Normal count Internal commutation Low slew rate Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Note 1 1 1 1 2 2 2 3 4 4 5 5 6 1 7 7
Commutation time select (See table 4)
1. The priority of operation for each bit is as shown in table 3. 2. This bit is using for start up of spindle motor. Please refer to the application note explained about start up of spindle motor. 3. The slew rate during every commutation of spindle motor is selectable by using this bit. Please select the suitable value of this bit for your motor. 4. This bit is used for setting up the commutation time (refer to figure 9) of spindle motor as shown in table 4. 5. This bit is used for setting up the off time at PWM driving of spindle motor as shown in table 5. 6. The gain of current control for spindle motor is selectable by using this bit. Please select the suitable value of this bit for your motor. 7. This bit will be used in fabrication test. Please set up D15 = "0" normally. SPNCTL terminal (pin 35) is using for output terminal in the case of "1" for testing. Then please do not input signal into pin 35 from outside.
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Table 3
Input
OTSD 12 VGOOD STAND BY SPN ENAB BRAKE RETRACT VC MENA B
Truth Table
Driver Output *1
Spindle Driver VCM Driver Retract Driver Power Switch
Enable Disable Disable Disable Disable Disable Disable Disable Disable Disable Disable Disable
Low Low High High High High High High High High High High
x*2 x Low High High High High High High High High High
x x x 0 0 1 0 0 1 0 0 1
x x x 0 1 x 0 1 x 0 1 x
x x x 0 0 0 0 0 0 1 1 1
x x x 0 0 0 1 1 1 x x x
Braking Braking Braking Cut off Braking On Cut off Braking On Cut off Braking On
Cut off Cut off Cut off Cut off Cut off Cut off On On On Cut off Cut off Cut off
On On Cut off Cut off Cut off Cut off Cut off Cut off Cut off On On On
Cut off Cut off Cut off On On On On On On On On On
Note:
1. The 12VGOOD terminal is open drain output type. The 12VGOOD signal output is determined by the power monitor output for 12 V power supply, POR output and OTSD signal as shown in the table below. 12 V Supply Cut off x x Normal POR x Low x High OTSD x x Enable Disable 12VGOOD Low Low Low High
2. The symbol "x" means "Don't care".
Table 4
SRCTL2 0 0 1 1
Commutation Time
SRCTL3 0 1 0 1 Commutation Time (s) 24 x (128 / fclk) 16 x (128 / fclk) 12 x (128 / fclk) No slew rate control
Note: The "fclk" is the frequency on pin "CLK". (Recommendation: 20 MHz)
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Table 5
OFFTIME1 0 0 1 1
OFF Time at PWM Drive
OFFTIME2 0 1 0 1 OFF Time (s) 1 x (32 / fclk) + (4 / fclk) 2 x (32 / fclk) + (4 / fclk) 3 x (32 / fclk) + (4 / fclk) 4 x (32 / fclk) + (4 / fclk)
Data Input Timing
SEENAB
Vth (= 2.4V Typ) t0 t2
t1
SCLK
Vth t3 t4
DATA
Vth D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
CLK Note: Data input timing (Latch point, Up date point) is determined by CLK as shown above, and t1 requires two or more clock pulse. t0: 20ns t2: 40ns t3: 40ns t4: 40ns Up date point Latch point
Figure 3 Input Timing of Serial Port
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HA13614FH
Timing Chart
Power on Reset (1)
Vhys Vsd Vpss, Vss and Vdd
t
POR 12VGOOD 1.0V Max *2
tpor
*2
0 t Note: 1. Please refer to external components table about how to determine the threshold voltage Vsd and delay time tpor. 2. Operation for Vss.
Figure 4 Power on Reset (2)
Vpss, Vss or Vdd POR 12VGOOD Spindle Driver VCM Driver Retract Driver ON OFF ON OFF
Operation of the Power Monitor (1)
tpor tpor
Note: This retract driver requires the electrical power from B-EMF of spindle motor.
Figure 5
,,,, ,,,,
Operation of the Power Monitor (2)
<1s
<1s
Retract
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HA13614FH
Power on Reset (3)
Vss
Vps POR 12VGOOD Spindle Driver VCM Driver Retract Driver ON OFF ON OFF ON OFF tpor tpor
Figure 6
Operation of the Power Monitor (3)
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Power Off Retract & Brake
Vps GND
Vpss GND POR GND ON Power SW OFF
U GND
Normal operation tBRKDLY* Normal operation Cut off GND Retract off VCM on
Braking
V, W
VCMP GND
Vretout
VCMN GND
Retract off VCM on
Vretsat t
Note: Please see the External Component table about setting delay time tBRKDLY.
Figure 7
Operation of Power Off Retract & Brake
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HA13614FH
Start-up of the Spindle motor
* Not using external commutation mode SPNENAB EXTCOM COMM PHASE IU 0 Low
IV
0
IW
0
Synchronous driving* B-EMF sensing driving
* Using external commutation mode SPNENAB
EXTCOM COMM PHASE IU 0
IV
0
IW
0
Synchronous driving* B-EMF sensing driving
Note: "Synchronous driving" is defined as the period after changing SPNENAB = L to H until the first positive edge of the PHASE signal.
Figure 8
Start-up of the Spindle Motor
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Commutation Timing of the Spindle motor
U V W
B-EMF
CT
PHASE (EXTCOM=0) *1 PHASE (EXTCOM=1) Vpss PWM OUTPUT PWM GND tspndly *2 IU tsrctl commutation time Note: 1. In the case of external commutation mode (EXTCOM=1), the signal PHASE will toggle at every BEMF zero-crossing, and selected the internal commutation mode (EXTCOM=0), the PHASE will have the same period as B-EMF of the spindle motor. 2. This is delay time by pre-LPF of the B-EMF amplifier. This delay time can be adjust by the value of external filter capacitor C101, C102. To get the maximum driving efficiency of the spindle motor, these capacitor value should be chosen as equation (17) in the "External components" section. 3. The slew rate of every commutation timing is controllable by changing the SRCTL1, SRCTL2 and SRCTL3 in the serial port. B-EMF PWM Vpss/2
*3 0
Figure 9
Commutation Timing of the Spindle motor
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Application
Vps (+12V) C111 C116 R109 C112 C101 C102 C103 Vss R110 41 12VGOOD 35 PHASE 34 SPNCTL V 21 W 27 36 COMM MPU 37 CLK RNF 22 ISENSE 26 RNF 31 VpsIN
19 BRKDLY
23 BRK 33 UFLT 32 NFLT 29 FLTOUT
VpsOUT 30 Vpss 28 C114 CT 25 U 20
HA13614FH
38 SCLK 40 DATA 39 SEENAB 43 VIPWMH 42 VIPWML 3 OP2IN(+) R3 5 OP2OUT 10 VCMIN R2 C1 C2 C3 C104 45 DACOUT 44 VREF
RETPOW 13 Vpsv 17 VCMSLC 12 RETSET 14 C115 C110 C109 R106 R105 VCMP 11 VCMPS 7 PC 6 VCMN 8 Rs 9 LVI1 47 Vdd (+3.3V) R107 LVI2 24 R108 BC1 15 C106 BC2 16 C107 VBST 18 C117 RS R104 C108 RL R101 R102
2 OP1IN(-) 1 OP1OUT Vss (+5V) to MPU C105 R103 C113 4 Vss 48 POR 46 DELAY TAB
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External Components
Parts No. R101 R102 R103 R104 R105 R106 R107 R108 R109 R110 R2 R3 Rnf RS C101, C102 C103 C104 C105 C106 C107 C108 C109 C110 C111 C112 C113 C114 C115 C116 C117 C1 C2 C3 Recommendation Value -- -- 5.6 k -- -- -- -- -- -- 5.6 k -- -- 0.33 0.47 -- -- 0.1 F 0.1 F 0.22 F 2.2 F -- 0. 1 F 0.1 F 0.1 F -- 0.1 F 0.1 F -- -- 0.1 F -- -- -- Stabilizing output voltage of retract driver for pin VCMP Set up time constance of delayed brake Stabilizing LVI2 terminal Filter constant of LPF 3 11 12 Keeping brake function By passing of power supply 12 Current sensing for spindle motor Current sensing for VCM Pre-filter of B-EMF amplifier Filter of PWMDAC for current control of spindle motor Filter of internal reference output Set up delay time of POR signal Boost up of power supply Stabilizing boost up voltage Gain dumping for VCM driver Stabilizing reference voltage of VCM driver By passing of power supply 5 8 7 4 10 9 Set up time constance of delayed brake Pull up for 12VGOOD terminal Filter constant of LPF 3 12 Set up threshold of power monitor for Vdd 1 Pull up for POR terminal Gain dumping for VCM driver Set up output voltage of retract driver for pin VCMP 5 6 Purpose Set up threshold of power monitor for Vps Note 1
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Notes: 1. The operation threshold voltage of Vps or Vdd is determined by resistor R101, R102 or R107, R108 as follows.
POR (for Vdd) 12VGOOD (for Vps)
Vdwn
Vup
Vps
* for Vps Recovery voltage Cut off voltage
Vup(Vps) = (Vsd1 + Vhys3) 1 + R101 R102
R101 R102 [V]
[V] (1)
Vdwn(Vps) = Vsd1 1 +
(2)
where, Vsd1 : Operating voltage of the power monitor [V] (refer to Electrical Charasteristics) Vhys3 : Hysteresis voltage of the power monitor [V] (refer to Electrical Charasteristics) * for Vdd Recovery R107 Vup(Vdd) = (Vsd1 + Vhys4) 1 + [V] voltage R108 (1)' Cut off voltage Vdwn(Vdd) = Vsd1 1 + R107 R108 [V] (2)'
where, Vhys4 : Hysteresis voltage of the power monitor [V] (refer to Electrical Charasteristics) 2. The relation between PWMDAC input VIPWMH, VIPWML for VCM driver current control and VCM driver input (VCMIN - VREF) is determined by following equation. (refer to below figure) 6.4 VCMIN - VREF = (64 DPWMH + DPWML) - 3.2 6500 (3) where, VREF DPWMH DPWML
VREF VIPWMH R1L R1H VIPWML R0
: Internal reference voltage [V] (refer to Electrical Charasteristics) : Duty of input signal on terminal VIPWMH [%] : Duty of input signal on terminal VIPWML [%]
VREF 5.3V OPAmp.2 + - C3 GND R4 R5 R5/R4=0.604 OP2IN(+) 5.3V VREF to VCM driver VCMIN 5.33.2V
DACOUT R2 C1
R3 C2
R1=R1L//R1H//R0 =740
OP2OUT VCMIN
3. The 3rd order LPF at next stage of PWMDAC is characterized by internal OP amp. and capacitor C1, C2, C3 and resistor R2, R3. These components value are determined by following equations. 1 C1 = [F] 2 fc R1 (4)
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HA13614FH
C3 = 220 10-12 C2 = [F] [F] (6) [] (7) (8) (5)
1 4k+1- 8k+1 C3 2 k2 k 4k+1- 8k+1 []
R2 =
2 2 fc C3
R3 = R2 k=
R5 = 0.604 R4
(9)
where, f c : Cut off frequency of 3rd order LPF [Hz] R1 : Output resistance of PWMDAC [] (refer to Electrical Characteristics) 4. The driving current of VCM Ivcm is determined by following equation. Vvcmin - VREF Ivcm = Gvcm [A] RS (10) where, Vvcmin : Input voltage on terminal VCMIN (pin 10) [V] Gvcm : Transfer function of VCM driver [dB] (refer to Electrical Characteristics) 5. Capacitor C108 and resistor R104 are useful to dump the gain peaking of VCM driver. These components also determine the gain band width of VCM driver BW1 which should be chosen less than 10 kHz, as follows. 12 BW1 Lvcm R104 = [k] RS (11) C108 = Lvcm 1 RS + RL R104 [F] (12)
where, RL : Coil resistance of VCM [] Lvcm : Coil inductance of VCM [H] 6. Retract current Iret is determined by following equation. 0.7 x 1 + Iret = R105 - Vretsat R106 RS + RL [A] (13)
Vretsat : Output saturation voltage of retract driver [V] (refer to Electrical Characteristics) 7. The relation between duty of input signal on terminal SPCNTL (pin 34) and output current of spindle motor driver Ispn is as follows. Vref - Voff1 Ispn = duty [A] Rnf (14) Vref : Reference voltage of current control amplifier [V] Vref = Vref2 (@SPNGAIN = 1) Vref = Vref3 (@SPNGAIN = 0) : Offset voltage of current control amplifier [V] (refer to Electrical Characteristics)
Voff1
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8. The delay time of the power monitor for start up is as follows. tpor = 140 C105 [ms] (15)
9. The cut off frequency fcpwm of the filter for current control input of the spindle motor is as follows. 1 fcpwm = [Hz] 2 x 20k C103 (16) 10. To get the maximum driving efficiency for spindle motor, the capacitor C101, C102 should be chosen as following equation. C101 = 0.8 C102 (17-1) C102 = tan(/6) 1 2 13k fbemf [F] (17-2)
fbemf : Back EMF frequency at standard rotation speed of the spindle motor [Hz] where, please set the value of C101, C102 so that C101 < C102 can be kept including the accuracy of the absolute value to assure the stability of motor starting and speed lock state. 11. To stabilize output voltage od retract driver, the capacitor C115 should be chosen as following equation. Please chose same values for C115. C115 = 3 10-6 2 (R105 // R106) [F] (18)
12. Time tBRKDLY of the delayed brake of V, W phase for retract is determined by resistor R109 and capacitor C112, C116 as following equation. Vthb C116 1+ tBRKDLY = - C116 R109 ln 1 - VBRK0 C112 C116 1+ C112 where, Vthb [s] (19)
: Threshold voltage that output MOS transistor of spindle motor driver is operated. VBRK0 = Vpss - 0.7 [V] Vpss : +12 V power supply for spindle motor driver and, please select capacitor C112 and C116 that the ratio of C112/C116 is more than 3 times, because the last voltage of BRK and BRKDLY terminals falls if the value of C116 is big for C112, and effect of brake goes down.
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Absolute Maximum Ratings
Item Power supply Symbol Vss Vpss Vpsv Spindle current VCM current Input voltage Power dissipation Junction temperature Storage temperature Ispn Ivcm Vin PT Tj Tstg Rating 6.0 15 15 2.0 1.5 -0.33 to Vss +1.0 5.0 150 -55 to +125 Unit V V V A A V W C C Note 1 2 2 3 3 4 5 6
Notes: 1. Operating voltage range is 4.25 V to 5.5 V. If power supply voltage exceed this operating range in actual application, the reliability of this IC can not be guaranteed. 2. Operating voltage range is 10.2 V to 13.8 V. 3. ASO (Area of Safety Operation) of each output transistor is shown in figure 10. Operating locus must be within the ASO. 4. Applied to CLK, COMM, SPNCTL, VIPWMH, VIPWML, SCLK, DATA and SEENAB. 5. Thermal resistance j-a 30C/W (Using 4 layer glass epoxy board) 6. Operating junction temperature range is 0C to +125C.
for Spindle motor driver
10 10
for VCM driver
IDS (A)
IDS (A)
2.0 1.0
t = 1 ms t = 10 ms t = 100 ms
1.5 1.0
t = 1 ms t = 10 ms t = 100 ms
0.10 1
10 15 VDS (V)
100
0.10 1
10 15 VDS (V)
100
Figure 10
ASO of Output Transistor
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Electrical Characteristics (Ta = 25C, Vss = 5 V, Vpss = Vpsv = 12 V)
Item Supply current Symbol Iss0 Iss1 Ips0 Ips1 Power switch Output on resistance Output leacage current Logic input Input low current Input high current Input low voltage Input high voltage Clock frequency Logic output1 Output high voltage Output low voltage Logic output2 Output leakage current Output low voltage Ron0 Icer0 Min -- -- -- -- -- -- Typ 2.0 3.2 1.6 42 0.2 -- Max 3.4 4.2 2.4 56 0.3 10 Unit mA mA mA mA A VpsOUT=15V, VpsIN=0V, Vss=0V, Vpss=Vpsv=0V Vil=0V Vih1=5V CLK, COMM, SCLK , DATA, SEENAB, VIPWMH, VIPWML, SPNCTL VpsIN VpsOUT Test Conditions Stand by, fclk=20MHz fclk=20MHz Stand by Vpss & Vpsv 1 Applicable Pins Vss Note
Iil1 Iih1 Vil1 Vih1 fclk Voh1 Vol1 Icer1
-- -- -- 2.0 19 4.6 -- --
-- -- -- -- -- -- -- --
10 10 0.8 -- 21 -- 0.4 10
A A V V MHz V V A
Ioh=1mA Iol=2mA Vo=5.5V
PHASE
POR, 12VGOOD
5
Vol2
--
--
0.4
V
Iol=2mA
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Electrical Characteristics (Ta = 25C, Vss = 5 V, Vpss = Vpsv = 12 V) (cont)
Item Spindle motor driver Output on resistance On resistance during braking Output leakage current Output clamp diode forward voltage Output MOS operating threshold voltage Leakage current on brake terminal Input filter & current control amp. Symbol Ron1 Min -- Typ 1.2 Max 1.5 Unit Test Conditions Io1.5A Applicable Pins U, V, W Note 2
Ron2 Icer3
-- --
-- --
3.0 2
mA
Io=0.4A, BRK=3V Vo=15V
Vf
--
0.9
1.2
V
If=0.5A
Vthb
--
2
--
V
Ron=(Ron/2)x10
Icer4
--
--
0.6
A
Vpsv=GND, Vo=8V SPNGAIN=1, SPNCTL=Vss SPNGAIN=0, SPNCTL=Vss SPNCTL=GND
BRK, BRKDLY ISENSE, FLTOUT
Vref2
--
490
10%
mV
Vref3 Current control amp. offset voltage B-EMF amp. Input offset voltage Voff1
-- --
250 -10
10% 20
mV mV
Voff2
--
--
20
mV
Synchronous drive
U, V, W, UFLT, NFLT
Voff3 Input hysteresis voltage Vhys1
-- 70
-- 90
20 110
mV mVp-p
B-EMF sens drive Synchronous drive
Vhys2
35
45
55
mVp-p
B-EMF sens drive
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Electrical Characteristics (Ta = 25C, Vss = 5 V, Vpss = Vpsv = 12 V) (cont)
Item VCM driver Output on resistance Output leakage current Output quiescent voltage Transfer gain Gain band width Input resistance PWM DAC Input minimum pulse width Output resistance Output voltage Symbol Ron2 Icer5 Min -- -- Typ 1.4 -- Max 1.8 2 Unit mA Test Conditions Io1.0A Vo=15V Applicable Pins VCMP, VCMN Note 2
Vq
--
Vpsv/2
5%
V
RS=0.47, RL=10, L=2mH, R104=1.6M, C108=120pF VCMPS, Rs 4
Gvcm BW1 Rin Tpwm
-- -- -- 50
-18 10 60 --
-- -- 30% --
dB kHz k ns
VCMIN VIPWMH, VIPWML FLTOUT VIPWMH=High, VIPWML=High VIPWMH=Low, VIPWML=Low VCMPS, Rs 3
R1 Vo1 Vo2
-- -- -- -- -- -- --
740 0.4 0.4 -- 64 5.3 1.0
30% 10% 10% 10 2% 5% 8%
V V mV -- V V Rat=VIPWMH/ VIPWML Io=1mA Vpss=6.0V, R105=13k , R106=33k , RL=10 , RS=0.47
Output offset voltage Gain ratio Reference voltage Retract driver Retract driver output voltage
Voff4 Rat Vref Vretout
VREF VCMP
VCMN output saturation voltage
Vretsat
0.1
0.2
0.4
V
VCMN
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Electrical Characteristics (Ta = 25C, Vss = 5 V, Vpss = Vpsv = 12 V) (cont)
Item Power monitor Operating voltage Hysteresis Symbol Vsd1 Vhys3 Vhys4 Cut off voltage Recovery voltage POR delay time OP amp.1 Output resistance Output maximum current Output voltage deviation Input bias current Gain band width OTSD Operating temperature Hysteresis Vsd2 Vrec tpor Rout2 Min -- -- -- 4.1 -- 10 -- Typ 1.415 60 30 -- -- 14 -- Max 3% -- -- -- 4.4 20 10 Unit V mV mV V V ms C105=0.1F Shorted between OP1OUT and OP1IN(-) POR OP1OUT Test Conditions Applicable Pins LVI1, LVI2 LVI1 LVI2 Vss Note
Iomax1
--
--
1
mA
Vdev IB1 BW2 Tsd Thys
-- -- -- 125 --
1.415 -- 1.0 150 25
3% 10 -- -- --
V nA MHz C C OP1IN(-) OP1OUT 4
Note:
1. Specified by sum of supply current to Vpss and Vpsv terminal. 2. Specified by sum of saturation voltage and lower saturation voltage. 3. Specified by differential voltage on both side of RS at shorting between DACOUT and OP2IN(+), and between OP2OUT and VCMIN, respectively. 4. Guaranteed by design. 5. The 12VGOOD terminal is open drain output type.
24
HA13614FH
Package Dimensions
Unit: mm 17.2 0.2
14
37 17.2 0.2
24
0.65 2.425 0.13 M 0.17 0.05 0.15 0.04 1.6 0.825 0 - 8 2.7 4.85
36
25
48 1 2.425
4.85
13 12
0.30 0.08 0.27 0.06
0.825
0.10 0.07
3.05 Max
2.925
0.10
2.925
2.925
2.925
0.8 0.3
Dimension including the plating thickness Base material dimension
Hitachi Code JEDEC EIAJ Weight (reference value)
FP-48T 1.2 g
25
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi's or any third party's patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party's rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi's sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi's sales office for any questions regarding this document or Hitachi semiconductor products.
Hitachi, Ltd.
Semiconductor & Integrated Circuits. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
URL
NorthAmerica : http:semiconductor.hitachi.com/ Europe : http://www.hitachi-eu.com/hel/ecg Asia (Singapore) : http://www.has.hitachi.com.sg/grp3/sicd/index.htm Asia (Taiwan) : http://www.hitachi.com.tw/E/Product/SICD_Frame.htm Asia (HongKong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm Japan : http://www.hitachi.co.jp/Sicd/indx.htm For further information write to:
Hitachi Semiconductor (America) Inc. 179 East Tasman Drive, San Jose,CA 95134 Tel: <1> (408) 433-1990 Fax: <1>(408) 433-0223 Hitachi Europe GmbH Electronic components Group Dornacher Strae 3 D-85622 Feldkirchen, Munich Germany Tel: <49> (89) 9 9180-0 Fax: <49> (89) 9 29 30 00 Hitachi Europe Ltd. Electronic Components Group. Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 778322 Hitachi Asia Pte. Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 049318 Tel: 535-2100 Fax: 535-1533 Hitachi Asia Ltd. Taipei Branch Office 3F, Hung Kuo Building. No.167, Tun-Hwa North Road, Taipei (105) Tel: <886> (2) 2718-3666 Fax: <886> (2) 2718-8180 Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Tsim Sha Tsui, Kowloon, Hong Kong Tel: <852> (2) 735 9218 Fax: <852> (2) 730 0281 Telex: 40815 HITEC HX
Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.

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